View IRFR4105PBF_773674.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

PD - 95550A
IRFR4105PBF IRFU4105PbF
Ultra Low On-Resistance l Surface Mount (IRFR4105) l Straight Lead (IRFU4105) l Fast Switching l Fully Avalanche Rated l Lead-Free Description
l
HEXFET(R) Power MOSFET
D
VDSS = 55V
G S
RDS(on) = 0.045 ID = 27A
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The D-PAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications.
D-PAK TO-252AA
I-PAK TO-251AA
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds
Max.
27 19 100 68 0.45 20 65 16 6.8 5.0 -55 to + 175 300 (1.6mm from case )
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RJC RJA RJA Junction-to-Case Junction-to-Ambient (PCB mount) ** Junction-to-Ambient
Typ.
--- --- ---
Max.
2.2 50 110
Units
C/W
www.irf.com
1
1/7/05
IRFR/U4105PbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. Typ. Max. Units Conditions 55 --- --- V VGS = 0V, ID = 250A --- 0.052 --- V/C Reference to 25C, I D = 1mA --- --- 0.045 VGS = 10V, ID = 16A 2.0 --- 4.0 V VDS = V GS, ID = 250A 6.5 --- --- S VDS = 25V, ID = 16A --- --- 25 VDS = 55V, VGS = 0V A --- --- 250 VDS = 44V, VGS = 0V, TJ = 150C --- --- 100 VGS = 20V nA --- --- -100 VGS = -20V --- --- 34 ID = 16A --- --- 6.8 nC VDS = 44V --- --- 14 VGS = 10V, See Fig. 6 and 13 --- 7.0 --- VDD = 28V --- 49 --- ID = 16A ns --- 31 --- RG = 18 --- 40 --- RD = 1.8, See Fig. 10 Between lead, --- 4.5 --- nH 6mm (0.25in.) G from package --- 7.5 --- and center of die contact --- 700 --- VGS = 0V --- 240 --- pF VDS = 25V --- 100 --- = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 27 showing the A G integral reverse --- --- 100 p-n junction diode. S --- --- 1.6 V TJ = 25C, IS = 16A, VGS = 0V --- 57 86 ns TJ = 25C, IF = 16A --- 130 200 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 ) VDD = 25V, starting TJ = 25C, L = 410H R G = 25, IAS = 16A. (See Figure 12)
Pulse width 300s; duty cycle 2% Calculated continuous current based on maximum allowable junction This is applied for I-PAK, Ls of D-PAK is measured between lead and
center of die contact temperature; Package limitation current = 20A
ISD 16A, di/dt 420A/s, VDD V(BR)DSS,
TJ 175C
Uses IRFZ34N data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994
2
www.irf.com
IRFR/U4105PbF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I , Drain-to-Source Current (A) D
I , Drain-to-Source Current (A) D
100
100
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
10
10
4.5V
4.5V
1
1
0.1 0.1
20s PULSE WIDTH TC = 25C
1 10
A
100
0.1 0.1
20s PULSE WIDTH TC = 175C
1 10 100
A
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
R DS(on) , Drain-to-Source On Resistance (Normalized)
100
2.4
I D = 26A
I D , Drain-to-Source Current (A)
2.0
TJ = 25C TJ = 175C
1.6
10
1.2
0.8
0.4
tion
1 4 5 6 7
V DS = 25V 20s PULSE WIDTH
8 9 10
A
0.0 -60 -40 -20 0 20 40 60
VGS = 10V
80 100 120 140 160 180
A
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
www.irf.com
3
IRFR/U4105PbF
1200
20
1000
V GS , Gate-to-Source Voltage (V)
V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd Ciss C oss = Cds + C gd
I D = 16A V DS = 44V V DS = 28V
16
C, Capacitance (pF)
800
Coss
600
12
8
400
Crss
200
4
0 1 10 100
A
0 0 10 20
FOR TEST CIRCUIT SEE FIGURE 13
30 40
A
VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R DS(on)
100
I D , Drain Current (A)
100 10s
TJ = 175C TJ = 25C
100s 10 1ms
10
1 0.4 0.8 1.2 1.6
VGS = 0V
A
1 1
TC = 25C TJ = 175C Single Pulse
10
2.0
A
100
VSD , Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
www.irf.com
IRFR/U4105PbF
30
LIMITED BY PACKAGE
25
V DS VGS RG
RD
D.U.T.
+
ID , Drain Current (A)
20
-VDD
5.0V
15
Pulse Width 1 s Duty Factor 0.1 %
10
Fig 10a. Switching Time Test Circuit
VDS 90%
5
0
25
50
75
100
125
150
175
TC , Case Temperature ( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1
D = 0.50 0.20 0.10 0.05 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1
0.1
0.02 0.01
0.01 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com
5
IRFR/U4105PbF
E AS , Single Pulse Avalanche Energy (mJ)
140
TOP
120
15V
BOTTOM
100
ID 6.5A 11A 16A
VDS
L
DRIVER
80
RG
10V
D.U.T
IAS tp
+ V - DD
60
A
0.01
40
Fig 12a. Unclamped Inductive Test Circuit
20
0
VDD = 25V
25 50 75 100 125 150
A
175
V(BR)DSS tp
Starting TJ , Junction Temperature (C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
5.0 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
www.irf.com
IRFR/U4105PbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
www.irf.com
7
IRFR/U4105PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF R120 WITH AS SEMB LY LOT CODE 1234 ASSEMBLED ON WW 16, 1999 IN THE ASS EMBLY LINE "A" Note: "P" in ass embly line position indicates "Lead-Free" PART NUMBER INTERNATIONAL RECTIFIER LOGO
IRFU120 12 916A 34
ASS EMBLY LOT CODE
DATE CODE YEAR 9 = 1999 WEEK 16 LINE A
OR
PART NUMBER INTERNATIONAL RECTIFIER LOGO
IRFU120 12 34
DATE CODE P = DESIGNAT ES LEAD-F REE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = ASS EMBLY SIT E CODE
ASS EMBLY LOT CODE
8
www.irf.com
IRFR/U4105PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRF U120 WIT H AS SEMBLY LOT CODE 5678 AS SEMBLE D ON WW 19, 1999 IN T HE ASSEMBLY LINE "A" Note: "P" in as s embly line pos ition indicates "Lead-F ree" PART NUMBER INT E RNAT IONAL RECT IFIER LOGO
IRFU120 919A 56 78
ASSE MBLY LOT CODE
DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A
OR
INT ERNAT IONAL RECT IFIER LOGO PART NUMBER
IRF U120 56 78
ASS EMBLY LOT CODE
DAT E CODE P = DESIGNAT ES LEAD-FREE PRODUCT (OPT IONAL) YEAR 9 = 1999 WEEK 19 A = ASS EMBLY SIT E CODE
www.irf.com
9
IRFR/U4105PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.1/05
10
www.irf.com

▲Up To Search▲

Price & Availability of IRFR4105PBF

	To Download IRFR4105PBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .